Performance Analysis of Electrical Characteristics of Hetero-junction LTFET at Different Temperatures for IoT Applications

Scaling down the metal-oxide- semiconductor (MOS) technology in the nanometer regime has been performed to achieve high device performance, but reliability and power consumption are the main concern for the semiconductor industry. In the past few years, area-scaled tunneling field-effect transistors (TFETs) have been researched aggressively to enhance the tunneling cross-sectional area of devices. Although the area-scaled Tfet increases the device footprint for the same channel length when compared to the conventional TFET structure. This problem can be resolved by considering a nonplanar device structure. The LTFET structure enhances the on-state current and reduces the device footprint area. In the present study, a detailed analysis of the electrical characteristics of L-shaped TFET (LTFET) through 2-D TCAD simulations is presented. The proposed hetero-junction LTFET with 20 nm gate length exhibits a high ION of 1.08×10-4 A/µm, low IOFF of 1.57×10-14 A/µm, high ION/IOFF of 1010, and steep sub-threshold slope (SS) of 25 mV/dec at room temperature. The analysis has been carried out to encounter the effect of Gaussian traps at the channel–gate oxide interface at a wide range of temperatures from 250 K to 350 K. An extensive study on the influence of temperature variations on various DC analysis, AC analysis, linearity analysis, and electrical noise analysis has been carried out. The study reveals that the electrical parameters like ION, IOFF, and SS, on which all figures of merit (FOMs) of the device depend, show a small variation with increasing temperature. The drain current noise spectral density (SID) changes from 2.12×10-26 A 2 /Hz to 2.42×10-20 A2 /Hz, and voltage noise spectral density (SVG) changes from 1.79×10-11 V2 /Hz to 1.97×10-5 V2 /Hz on increasing temperature from 250 K to 350 K. The change in temperature does not impact the on-current of the device, while a small variation in the off-current occurs. The various FOMs of the device also show small variations in the results with increasing temperature. The only unfavorable factor where the evident change in the results has been observed is the electrical noise characteristics of the device. The reliability analysis clarifies that the proposed LTFET device performs well at a wide range of temperatures and can be well-suited for low-power applications.

Keywords: Noise analysis, Interface Traps, Gaussian Traps, Reliability Analysis, Band-To-Band Tunneling (BTBT), Temperature.